Comparing Time-Domain and Frequency-Domain Techniques for Investigation on Charge Delivery and Power-Bus Noise for High-Speed Printed Circuit Boards
Content by:
James L. Drewniak, University of Missouri-Rolla
Bruce Archambeault, IBM
James Knighten, NCR Corporation
Giuseppe Selli, University of Missouri -Rolla
Jun Fan, NCR Corporation
Matteo Cocchini, University of Missouri-Rolla
Samuel Connor, IBM
Liang Xue, National Semiconductor
The performance of power distribution networks is critical to high-speed digital circuits in terms of both signal integrity and radiated emission.
This paper studies charge delivery of a power distribution network, as well as power bus noise resulting from device switching, in the time domain as well as the frequency domain. Some of the PDN performance analysis is easier to understand when analyzed in the time domain. The effects of capacitor location, capacitor value, power/ground plane pair location within the stackup, board size, and dielectric material are discussed.
Media Spotlight
Manufacturing-Aware Design Process
Content by: Mark Laing, Mentor Graphics
"With the increased complexity of PCBs, it becomes more and more important to incorporate manufacturing feedback into the design process. It is much easier to incorporate manufacturing input early to the design process than to try and incorporate after an initial layout is complete
Read full Artical from IEC Newsletter Feb08 Vol1
James L. Drewniak, University of Missouri-Rolla
Bruce Archambeault, IBM
James Knighten, NCR Corporation
Giuseppe Selli, University of Missouri -Rolla
Jun Fan, NCR Corporation
Matteo Cocchini, University of Missouri-Rolla
Samuel Connor, IBM
Liang Xue, National Semiconductor
The performance of power distribution networks is critical to high-speed digital circuits in terms of both signal integrity and radiated emission.
This paper studies charge delivery of a power distribution network, as well as power bus noise resulting from device switching, in the time domain as well as the frequency domain. Some of the PDN performance analysis is easier to understand when analyzed in the time domain. The effects of capacitor location, capacitor value, power/ground plane pair location within the stackup, board size, and dielectric material are discussed.
Media Spotlight
Manufacturing-Aware Design Process
Content by: Mark Laing, Mentor Graphics
"With the increased complexity of PCBs, it becomes more and more important to incorporate manufacturing feedback into the design process. It is much easier to incorporate manufacturing input early to the design process than to try and incorporate after an initial layout is complete
Read full Artical from IEC Newsletter Feb08 Vol1
Download the brief PDF version from attachment
