Memory Based Architecture is one of the famous architectures used in desgn Fast Fourier Transform fft processor, the basic idea of this architecture is to store the input point  in memory component then perform the following processing cycle (catch data, calculate, and save result in memory again).    As we see in figure 1, this architecture contain two basic elements; Memory/Ram component that contain the input point data, interleaving calculated data while processing, and the output point data, The second component is the processing unit , this element just contain butterfly processor element(s).  The number of butterflies elements or Memory/Ram banks in this architecture is depending on the design issues and specifications.    We can improve the performance of this architecture by adding an additional cache memory between memories and processing block to increase the efficiency of memory accessing.

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Full Text (PDF)	Design FFT Processor Memory Architecture	691 Kb	Aug-20-2008 1:40pm